SEL-PROTECTS Project: Single-Event Latch-up PROTECTion devices for Space

SEL-PROTECTS Project: Single-Event Latch-up PROTECTion devices for Space

  

Home » Projects » SEL-PROTECTS Project: Single-Event Latch-up PROTECTion devices for Space

SEL-PROTECTS is R&D initiative addressing the need for destructive space radiation protection at the chip level. The main objective is to develop commercial integrated circuits that protect COTS components from Single-Event Latch-Up (SEL) effects by monitoring current consumption of the Device Under Protection (DUP), and autonomously disconnecting power before radiation-induced currents exceed safe limits, preventing irreversible damage.

The innovative strategy behind the project lies in the development of a compact monolithic mixed-signal IC that integrates all required building blocks, current sensor, peak detector, power transistor switch, current reference generator, and adaptive threshold learning. This unique learning based protection mode removes dependence on external components and control lines, providing adaptive disconnection thresholds that can evolve during long-term missions, compensating for device ageing and TID cumulative radiation degradation, a capability missing in the industry that is not yet available in the space electronics market.

SEL-PROTECTS strengthens ALTER Technology’s leadership in the space microelectronics sector, while expanding our product pre-development portfolio. In this consortium, USE contributes with its IC design expertise as a CERN Associated Institute and ESA collaborator, and ALTER provides high-reliability EEE parts engineering, device testing, component-level validation in radiation facilities, COTS protection industrialisation pathway and prototype commercialisation transfer to the space sector. This collaboration can accelerate national competitiveness and support Europe’s technological resilience in future aerospace missions.

 

Figure 1. Block diagram of the proposed system

 

*This project is funded by the Spanish Ministry of Science and Innovation under grant number CPP2021-008565.

 

Fernando J. Márquez

Fernando J. Márquez was born in Seville, Spain, in 1982. He received his Telecommunication Engineering degree and Ph.D. from the University of Seville. After more than 20 years as a lecturer and researcher in Electronic Engineering, focusing on microelectronic and radiation-tolerant analog and mixed-signal circuit design, he joined Alter Technology in 2024 as an Electronic Test Development Engineer in the Electrical Measurement Department.

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